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Posted on 31 Dec, 2025
- Industry - IT - INFORMATION TECHNOLOGY
- Functional Area - IT Hardware EDA / VLSI / ASIC / Chip Designing / Networking / Remote Sensing
- Job Role - Other Top Management IT Hardware EDA / VLSI / ASIC / Chip Designing / Networking / Remote Sensing
- Employment type - Full Time - Permanent
- Work Mode - In Office
- Independently plan and execute end-to-end Physical Design activities from netlist to GDSII.
- Perform floorplanning, placement, optimization, and place & route using Innovus.
- Handle Clock Tree Synthesis (CTS), clock distribution, and timing optimization.
- Achieve timing convergence including setup, hold, and OCV/CRPR scenarios.
- Any Graduate - Any Specialization
- Any Post Graduate - Any Specialization
- Any Doctorate - Any Specialization
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