Design Verification Engineer

• Experience in IP/SOC verification

• Worked on full project cycles, including tape-outs

• Strong in debugging design & verification failures

• Proficient in Verilog, SystemVerilog, UVM

• Skills- functional coverage development & closure

• Developed assertions and checkers

• Test case planning and creation

• Practical knowledge of PCIe, Ethernet, CXL, USB, and CAN

Overview

• Industry - OTHERS
• Job Role - Other Top Management IT Hardware EDA / VLSI / ASIC / Chip Designing / Networking / Remote Sensing
• Employment type - Full Time - Permanent
• Work Mode - In Office

Qualifications

• Any Graduate - Any Specialization
• Any Post Graduate - Any Specialization
• Any Doctorate - Any Specialization

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