Analog Layout Engineers

• Expert in FinFET layout (16nm–3nm)

• Strong in PNR: CTS, routing, timing closure

• Hands-on: SERDES, PHY, PLL, ADC, DAC, LDO, Bandgap, etc.

• Good knowledge of CMOS, Bi-CMOS, SOI

• AMS IP integration & physical verification

• B.Tech / M.Tech

Overview

• Industry - Management Consulting
• Functional Area - IT Hardware EDA / VLSI / ASIC / Chip Designing / Networking / Remote Sensing
• Job Role - IC Layout Engineer
• Employment type - Full Time - Permanent
• Work Mode - In Office
• Open To Hire - Other Industry

Qualifications

• Any Graduate - Any Specialization
• Any Post Graduate - Any Specialization
• Any Doctorate - Any Specialization

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