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Posted on 25 Aug, 2025
Expert in FinFET layout (16nm–3nm)
Strong in PNR: CTS, routing, timing closure
Hands-on: SERDES, PHY, PLL, ADC, DAC, LDO, Bandgap, etc.
Good knowledge of CMOS, Bi-CMOS, SOI
AMS IP integration & physical verification
B.Tech / M.Tech