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Analog Layout Engineer- FPGA/System Verilog
SmartSoC Solutions Pvt. Ltd.
Bengaluru / Bangalore
Not Disclosed
4 - 5 Years
Full Time - Permanent
Views:151
Applicants:4
Posted on 9 Aug, 2024
In Office
Job Description | Responsibilities
- Developing and executing verification plans based on functional and performance requirements.
- Creating maintaining verfication enviorments using industry-standard methodologies and tools (e.g. UVM, System Verilog).
- Desiging and implementing resuable testbenches and test cases to achive high verfication coverage.
- Collaborating with design
Overview
- Industry - IT - Software / Product Development
- Functional Area - Site Engineering / Project Management
- Job Role - IC Layout Engineer
- Employment type - Full Time - Permanent
- Work Mode - In Office
Qualifications
- Any Graduate - Any Specialization
- Any Post Graduate - Any Specialization
- Any Doctorate - Any Specialization
Job Related Keywords
Analog layout
Analog Semiconductors
Computer Architecture
Digital Designs
Root Cause
System Verilog