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Applicants:0
Posted on 31 Jul, 2025
Sorry, this vacancy has been closed and is no longer accepting applications.
Overview
- Industry - HR, HUMAN RESOURCES
- Functional Area - Site Engineering / Project Management
- Job Role - Engineer - Other
- Employment type - Full Time - Permanent
- Work Mode - In Office
Job Description | Role and Responsibilities
- Good understanding of ASIC verification concepts and techniques. Very good knowledge of Verilog/System Verilog and UVM.
- Experience and knowledge in Verification of SoCs related to different applications.
- Good Knowledge in Power aware verification and Gate level verification is preferable.
Candidate Profile | Who Can Apply
Education
- Any Graduate - Any Specialization
- Any Post Graduate - Any Specialization
- Any Doctorate - Any Specialization
Job Related Keywords
About Employer
Sorry, this vacancy has been closed and is no longer accepting applications.
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