Design Verification Engineer

• Good understanding of ASIC verification concepts and techniques. Very good knowledge of Verilog/System Verilog and UVM.
• Experience and knowledge in Verification of SoCs related to different applications.
• Good Knowledge in Power aware verification and Gate level verification is preferable.

Overview

• Industry - HR, HUMAN RESOURCES
• Functional Area - Site Engineering / Project Management
• Job Role - Engineer - Other
• Employment type - Full Time - Permanent
• Work Mode - In Office

Qualifications

• Any Graduate - Any Specialization
• Any Post Graduate - Any Specialization
• Any Doctorate - Any Specialization

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