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Posted on 10 Aug, 2026
In Office
Job Description | Responsibilities
- Perform requirements generation and FPGA RTL design using VHDL/Verilog.
- Develop FPGA-based solutions adhering to the DO-254 development lifecycle.
- Work on synthesis, Static Timing Analysis (STA), timing closure, and design constraints.
- Design and implement high-speed interfaces such as PCIe, DDR, JESD, and Ethernet.
- Continuously improve FPGA simulation, testing, and validation environments.
Overview
- Industry - IT - INFORMATION TECHNOLOGY
- Job Role - Senior Engineer – FPGA (HDD)
- Employment type - Full Time - Permanent
- Work Mode - In Office
Qualifications
- Any Graduate - Any Specialization
- Any Post Graduate - Any Specialization
- Any Doctorate - Any Specialization
Job Related Keywords
FPGA
HDD
Verilog
VHDL
RTL Design
FPGA Verification
Hardware Design
Digital Logic
Timing Analysis