Field-Programmable Gate Arrays Engineer

1) Should be comfortable with Vivado

2) Coding language: VHDL/Verilog/SystemVerilog

3) Should have developed AXI peripherals for Zynq and other Xilinx FPGAs. Should have a knowledge of the PS and PL parts

4) Should know how to implement timing and other constraints

5) Should know how to interface external memory using the EMC in Vivado

Overview

• Industry - DEFENCE / DEFENSE - Arms / Amunitions / Explosives / Defence Equipments
• Functional Area - IT Software Programming / Analysis / Quality / Testing / Training
• Job Role - Other IT Software Programming / Analysis / Quality / Testing / Training
• Employment type - Full Time - Permanent
• Work Mode - In Office

Qualifications

• Any Graduate - Any Specialization
• Any Post Graduate - Any Specialization
• Any Doctorate - Any Specialization

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